ASIC Chip-Tapeout of Reconfigurable Multiple-Radix Parallel-Turbo-Decoder for Next-Generation Wireless-Communication Systems.
Principle Investigator: Dr. Rahul Shrestha.
Scheme: 2015 Early-Career Research-Award from the Science and Engineering Research Board (SERB).
Granting Agency: Department of Science and Technology (DST), Govt. of India.
Amount Sanctioned: Rs. 24,78,000/-.
Duration: Three years (Started on Feb-2015).
Status: Completed.
Project-II
ASIC Implementation of Hardware-Efficient & Low-Power Spectrum Sensor Based on Cyclostationary Feature Detection for Cognitive-Radio Mobile-Broadband System.
Principle Investigator: Dr. Rahul Shrestha.
Scheme: Faculty Seed Grant.
Granting Agency: Indian Insitute of Technology (IIT) Mandi.
Amount Sanctioned: Rs. 10,00,000/-.
Duration: Three years (Started on April 2018).
Status: Completed.
Project-III
Development of a low cost low magnetic field MRI for Point of Care Testing, and associated CAD system.
Co-Principle Investigator: Dr. Rahul Shrestha.
Granting Agency: Jointly funded by IIT Ropar IIT Mandi PGIMER Chandigarh BioX Consortium, Government of India.
Amount Sanctioned: Rs. 20,00,000/-.
Duration: Two years (2016-2018).
Status: Completed.
Project-IV
Design and Fabrication of an Interface ASIC for a Vibratory Gyroscope Sensor Application.
Co-Principle Investigator: Dr. Rahul Shrestha.
Granting Agency: Indain Space Research Organisation (ISRO) - Inertial Systems Unit (IISU), Thiruvananthapuram, Kerala.
Amount Sanctioned: Rs. 48,00,000/-.
Duration: Three years (2018-2021).
Status: Completed.
Project-V
High-Throughput & Energy-Efficient Flexible-Turbo/LDPC Decoder for the Next- Generation Wireless- Communication System.
Principle Investigator: Dr. Rahul Shrestha.
Scheme: Interdisciplinary Cyber Physical Systems (ICPS) Programme.
Granting Agency: Department of Science and Technology (DST), Govt. of India.
Amount Sanctioned: Rs. 58,00,000/-.
Duration: Three years (Extended) (Started on October 2019).
Status: Ongoing.
Project-VI
The Design and Analysis of a Silicon particle detector Array using High Voltage CMOS Process for Space Applications.
Co-Investigator: Dr. Rahul Shrestha.
Scheme: Under RESPOND Programme.
Granting Agency: Indain Space Research Organisation (ISRO) - Department of Space
Amount Sanctioned: Rs. 32,29,000/-.
Duration: Three years (Started on April 2022).
Status: Ongoing.
Project-VII
ASIC and Package Design of Ultra Small Atomic Clock.
Co-Investigator: Dr. Rahul Shrestha.
Scheme: Under Chip to Startup (C2S) Programme.
Granting Agency: Ministry of Electronics and Information Technology (Microelectronics Development Division) - Government of India