Srinivasu
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Publications

Books

  1. K. Sridharan, B. Srinivasu , P. Vikramkumar “ Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology ”, Springer , 2020.

Journals

  1. N. Kaushik and B. Srinivasu “ Energy Efficient Memristor-based Subtractors and Comparator for In-Memory Computing in MAGIC”, IEEE Transactions on Circuits and Systems II: Express Briefs , Accepted 2023.

  2. Furqan Zahoor, Mehwish Hanif, Usman Isyaku Bature, Srinivasu Bodapati , Anupam Chattopadhyay, Fawnizu Azmadi Hussin, Haider Abbas, Farhad Merchant and Faisal Bashir “ Carbon nanotube field effect transistors : an overview of device structure, modeling, fabrication and applications ” Physica Scripta , Accepted, 2023.

  3. N. Kaushik and B. Srinivasu “ IMPLY-Based High-Speed Conditional Carry and Carry Select Adders for In-Memory Computing ” IEEE Transactions on Nanotechnology , vol. 22, pp. 280-290, 2023, doi: 10.1109/TNANO.2023.3284845.

  4. B. Srinivasu , K. Sridharan “ Low-Power and High-Performance Ternary SRAM Designs With Application to CNTFET Technology ”, IEEE Transactions on Nanotechnology, vol. 20, pp. 562-566, 2021.

  5. S. Mandal, A. Chakrabarti and B. Srinivasu “ Clustered Error Resilient SRAM-Based Reconfigurable Computing Platform ”, IEEE Transactions on Aerospace and Electronic Systems, vol. 57, no. 3, pp. 1768-1779, June 2021.

  6. B. Srinivasu , K. Sridharan “A synthesis methodology for ternary logic circuits in emerging device technologies ”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 2416-2159, Apr. 2017.

  7. Bodapati Srinivasu , K. Sridharan “Carbon Nanotube FET-based Low-Delay and Low-Power Multi digit Adder Designs ”, IET Circuits, Devices & Systems, vol. 11, no. 4, pp. 352-364, Nov. 2016.

  8. B. Srinivasu , K. Sridharan “A transistor-level probabilistic approach for reliability analysis of arithmetic circuits with applications to emerging technologies ”, IEEE Transactions on Reliability , vol. 66, no. 2, pp. 440-457, Jan. 2017.

  9. B. Srinivasu , K. Sridharan “ Low-complexity multiternary digit multiplier design in cntfet technology ”, IEEE Transactions on Circuits and Systems II: Express Briefs , vol. 63, no. 8, pp. 753-757, Feb. 2016.

Conferences

  1. Shivani Thakur and B. Srinivasu “ Ternary D Flip Flop in CNFET-Memristor Technology ”, International Conference on Frontiers in Computing and Systems (COMSYS 2023), Accepted 2023.

  2. N. Kaushik and B. Srinivasu “ Energy Efficient Memristor-based Subtractors and Comparator for In-Memory Computing in MAGIC”, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Accepted 2023.

  3. Shivani Thakur and B. Srinivasu “ Ternary Systolic Array Architecture for Matrix Multiplication in CNFET-Memristor Technology ”, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Accepted 2023.

  4. Kamal Raj, B. Srinivasu “ FPGA Based Light Weight Encryption of Medical Data for IoMT Devices Using ASCON Cipher ”, 2022 IEEE International Symposium on Smart Electronic Systems (iSES), 2022, Accepted.

  5. Nandit Kaushik, B. Srinivasu “ Memristor-based High Speed and Area Efficient Multi-bit Comparators in IMPLY Logic ”, 2023 IEEE 36th International Conference on VLSI Design {VLSID), 2023, Accepted.

  6. Simranjeet Singh, Srinivasu Bodapati, Sachin Patkar, Rainer Leupers, Anupam Chattopadhyay and Farhad Merchant “ PA-PUF: A Novel Priority Arbiter PUF ”, "30th IEEE/IFIP VLSI-SoC, 2022, Accepted.

  7. P. Srikanth, B. Srinivasu “ High Performance Ternary Full Adder in CNFET-Memristor Technology ”, 2022 26th International Symposium on VLSI Design and Test (VDAT), 2022, Accepted.

  8. P. Srikanth, B. Srinivasu, Nandit Kaushik “ Ternary Full Adder in CMOS-Memristor Technology ”, 2022 IEEE 22nd International Conference on Nanotechnology (NANO), 2022, Accepted.

  9. Nandit Kaushik, B. Srinivasu “ Implementation of IMPLY-based Memristive Subtractor ”, 2022 IEEE 22nd International Conference on Nanotechnology (NANO), 2022, Accepted.

  10. K. B. Dheeraj Kumar, L. B. Reddy, V. Pudi and S. Bodapati , "Design of Low Area and Low Power Systolic Serial Parallel Multiplier using CNTFETs," 2021 IEEE International Symposium on Smart Electronic Systems (iSES), 2021, pp. 139-142.

  11. B. Srinivasu , Anupam Chattopadhyay “Cycle PUF: A Cycle operator based PUF in Carbon Nanotube FET Technology ”, 2021 IEEE 21st International Conference on Nanotechnology (NANO), 13-16, 2021.

  12. Pudi Vikramkumar, B.Srinivasu , Sachin Kumar, Anupam Chattopadhyay, “ Cyber Security Protocol for Secure Traffic Monitoring Systems using PUF-based Key Management”, 2020 IEEE International Symposium on Smart Electronic Systems (iSES), 2020, pp. 103-108.

  13. Akhilesh Anilkumar Siddhanti, Srinivasu Bodapati , Anupam Chattopadhyay, Subhamoy Maitra, Dibyendu Roy and Pantelimon Stanica “Analysis of the Strict Avalanche Criterion in variants of Arbiter-based Physically Unclonable Functions ”, In Progress in Cryptology - INDOCRYPT 2019 - 20th International Conference on Cryptology in India, Hyderabad, India, December 15-18, 2019, Proceedings, volume 11898 of Lecture Notes in Computer Science, pages 556-577. Springer.

  14. B. Srinivasu , P. Vikramkumar, Anupam Chattopadhyay, Kwok-Yan Lam “CoLPUF: A Novel Configurable LFSR-based PUF ”, IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),358-361, 2018.

  15. B. Srinivasu , K. Sridharan “Reliability analysis of full adder in Schottky Barrier Carbon Nanotube FET technology ”, 14th IEEE International Conference on Nanotechnology, 274-277, 2014.