Dr. Hitesh Shrimali

Phone : +91-(1905)267113
EMail : hitesh@iitmandi.ac.in, hitesh.shrimali@mi.infn.it
Address : School of Computing and Electrical Engineering
Address: A1-617, A1-Building
School of Computing and electrical Engineering
Kamand Campus, IIT Mandi
Mandi, Himachal Pradesh -- 175005
India

Bio-sketch

    I am an assistant professor in the school of computing and electrical engineering. Before joining IIT Mandi, I did B.E. from Nirma Institute of Technology (Ahmedabad), M.Tech. from IIT Kharagpur and Ph.D. from IIT Delhi. My M.Tech. and Ph.D. theses were under the guidance of Prof. Amit Patra and Dr. Shouri Chatterjee respectively. After that I joined STMicroelectronics (Greater Noida) as a senior design engineer. After having 2 years of industrial experience, I worked with Università degli Studi di Milano as a post doctorate researcher, under the guidance of Prof. Valentino Liberali. During post-doctorate experience, I was also associated with INFN [Istituto Nazionale di Fisica Nucleare] Milano.

Research interests

  • Design and testing of radiation hard circuits [CMOS silicon detectors]
  • Analog and mixed signal VLSI design [ADCs]
  • Modeling of radiation effects on analog and mixed signal circuits
  • On-chip Instrumentation

Work Experience

  • Assistant Professor: Indian Institute of Technology Mandi [Dec'14 -- present]
  • Post Doctorate Researcher: Università degli Studi di Milano [Jun'13 -- Dec'14]
  • Senior Design Engineer: STMicroelectronics, Greater Noida [Aug'11 - Jun'13]

Academic Administrative Experience

    Present duties

  • Advisor, Science and Technology – Council, IIT Mandi [Apr'16 - presnt]
  • Advisor, Robotronics Club, IIT Mandi [Apr'16 - presnt]
  • Co-advisor, Career and Placement Cell, IIT Mandi [Apr'16 - presnt]
  • Faculty advisor, M. Tech. (VLSI), 2016-batch, IIT Mandi [Aug'16 - present]
  • Faculty advisor, B. Tech. (EE), 2015-batch, IIT Mandi [Aug'15 - present]
  • Past duties

  • Event Advisor, Inter IIT Tech Meet 2016
  • Advisor, Electronics Club, IIT Mandi [Mar'15 - Apr'16]
  • Advisor, IEEE IES IIT Mandi student chapter (Aug'15 - Apr'16),
  • Co-advisor, Cultural Club, IIT Mandi [Mar'15 - Apr'16]

Students and project staff

PhD students (Institute Scholars)

PhD students under DeitY Visweswaraya fellowship

  • Ashish Joshi (with co-supervision of Dr. Satinder Sharma)
  • Vijender Sharma (with co-supervision of Dr. Jai Narayan Tripathi [Technical Leader, STMicroelectronics])

PhD student under SMDP-C2SD project

  • Dinesh Kumar B.

SMDP-C2SD Project Staff

  • Dinesh Kumar B.: Project Engineer (Mar'16 to present)
  • Ankita Deo: Project Associate (Mar'17 to present)

Graduated students

  • Niraj Singh (B.Tech. EE - 2016)
  • Rohit Raghav (B.Tech. EE - 2016)

Teaching

  • [Feb-Jun 2017]: IC161 -- Applied Electronics
  • [Feb-Jun 2017]: IC161P -- Applied Electronics laboratory
  • [Aug-Dec 2016]: EE512 -- CMOS Analog IC design
  • [Aug-Dec 2016]: DP504P -- Electrical and Mechanical Workshop (for M. Sc. students)
  • [Feb-Jun 2016]: EE619 -- Mixed Signal VLSI Design
  • [Feb-Jun 2016]: IC161 -- Applied Electronics
  • [Feb-Jun 2016]: IC161P -- Applied Electronics laboratory
  • [Feb-Jun 2016]: IC201P -- Design Practicum (Mentor for one group)
  • [Aug-Dec 2015]: EE512 -- CMOS Analog IC design
  • [Aug-Dec 2015]: DP504P -- Electrical and Mechanical Workshop (for M. Sc. students)
  • [Feb-Jun 2015]: EE512 -- Analog IC design
  • [Feb-Jun 2015]: IC161 -- Applied Electronics
  • [Feb-Jun 2015]: IC161P -- Applied Electronics laboratory
  • [Feb-Jun 2015]: IC201P -- Design Practicum (Mentor for two groups)

Activities

  • IEEE professional member and IEEE societies member for NPS, CAS, IES and SSCS,
  • Reviewer of IEEE transaction on VLSI design, Journal of Circuits, Systems and Signal Processing (Springer) and IETE,
  • Reviewer of conference of IEEE ISCAS 2012 and 2015 , IEEE VLSI Design 2016 and MWSCAS 2016,

Research Publications

Peer Reviewed International Journals

  1. A. Joshi, H. Shrimali and S. Sharma, "A Systematic Design Approach for a Gain Boosted Telescopic OTA with Cross Coupled Capacitor" in IET Circuits, Devices & Systems, 2017 (accepted).
  2. A. Andreazza, A. Castoldi, V. Ceriale, G. Chiodini, M. Citterio, G. Darbo, G. Gariano, A. Gaudiello, C. Guazzoni, A. Joshi, V. Liberali, S. Passadore, F. Ragusa, E. Ruscino, C. Sbarra, A. Sidoti, H. Shrimali, A. Stabile, I. Yadav and E. Zaffaroni, "HV-CMOS detectors in BCD8 technology", Journal of Instrumentation, IOP Science, vol. 11, Nov. 2016, C11038.
  3. H. Shrimali and Shouri Chatterjee, "A Technique to Linearize the Discrete-Time Parametric Amplifier and its Variants," Elsevier Microelectronics Journal, vol. 46, no. 11, Nov 2015.
  4. H. Shrimali and V. Liberali, "Parametric Amplifier based Dynamic clocked Comparator," Elsevier Solid State Electronics, vol. 101, pg. 85-89, Nov. 2014.
  5. A. Camplani, S. Shojaii, H. Shrimali, V Liberali, “CMOS IC Radiation Hardening by Design”, in FACTA Universitatis, Journal series: Electronics and Energetics Vol. 27, no. 2, June 2014, pp.251–258.
  6. H. Shrimali and S. Chatterjee, "Distortion analysis of a three terminal MOS-based discrete time parametric amplifier," in IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 58 , No. 12, Dec. 2011, pp. 902–905.

Peer Reviewed International Conferences

  1. A. Andreazza, A. Castoldi, V. Ceriale, G. Chiodini, M. Citterio, G. Darbo, G. Gariano, A. Gaudiello, C. Guazzoni, V. Liberali, S. Passadore, F. Ragusa, A. Rovani, E. Ruscino, C. Sbarra, H. Shrimali and E. Zaffaroni, "HV-CMOS detectors for High Energy Physics: characterization of BCD8 technology and controlled hybridization technique" in IEEE Nuclear Science Symposium 2016 (NSS), Oct. 29- Nov. 6, 2016.
  2. A. Joshi, I. Yadav, S. Sharma, H. Shrimali , "The Pole-zero Doublet: a Cascode Operational Amplifier with Cross Coupled Capacitor" in IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi (UAE), Oct. 16-19, 2016
  3. A. Andreazza, A. Castoldi, V. Ceriale, G. Chiodini, M. Citterio, G. Darbo, G. Gariano, A. Gaudiello, C. Guazzoni, V. Liberali, S. Passadore, F. Ragusa, A. Rovani, E. Ruscino, C. Sbarra, H. Shrimali and E. Zaffaroni, "Characterization of HV-CMOS detectors in BCD8 technology and of a controlled hybridization technique", in the International Workshop on Vertex Detectors, Vertex 2016, Isola d'Elba, Italy, Sept. 25-30, 2016.
  4. A. Andreazza, A. Castoldi, G. Chiodini, M. Citterio, G. Darbo, G. Gariano, A. Gaudiello, C. Guazzoni, A. Joshi, V. Liberali, S. Passadore, F. Ragusa, E. Ruscino, C. Sbarra, A. Sidoti, H. Shrimali, I. Yadav and E. Zaffaroni, "HV-CMOS detectors in BCD8 technology", in the International Workshop on Semiconductor Pixel Detectors for Particles and Imaging (Pixel 2016), Sestri Levante, Italy, Sept. 5-9, 2016.
  5. A. Andreazza, A. Castoldi, G. Chiodini, M. Citterio, G. Darbo, G. Gariano, A. Gaudiello, C. Guazzoni, V. Liberali, S. Passadore, F. Ragusa, A. Rovani, E. Ruscino, C. Sbarra, A. Sidoti, H. Shrimali and E. Zaffaroni, "HV-CMOS detectors for High Energy Physics: characterization of BCD8 technology and controlled hybridization technique", in the International Workshops on Radiation Imaging Detectors (iWoRid), Barcelona, Spain, July 3-7, 2016.
  6. J. Tripathi, V. Sharma, H. Advani, P. Singh, H. Shrimali and R. Malik, "An Analysis of Power Supply Induced Jitter for a Voltage Mode Driver in High Speed Serial Links", in IEEE Workshop on Signal and Power Integrity (SPI), Turin, Italy, May 8-11, 2016.
  7. H. Shrimali and V. Liberali, "The Start-up Circuit for a Low Voltage Bandgap Reference", in IEEE International Conference on Electronics Circuits and Systems (ICECS), Marseille, France, Dec 7-10, 2014.
  8. H. Shrimali and V. Liberali, "A Threshold Voltage Modeling for A Spacer-Trapping Memory Cell Using Verilog-A," in Workshop on Compact Modeling (WCM), Washington, USA, June 16-18, 2014.
  9. H. Shrimali, “Discrete Time Parametric Amplifier based Dynamic clocked Comparator” in International Semiconductor Device Research Symposium (ISDRS) 2013, Bethesda (Maryland), Dec. 10-13, 2013.
  10. H. Shrimali and S. Chatterjee, "Third order harmonic cancellation technique for a parametric amplifier," in IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, May 15-18, 2011, pp. 1880–1883.
  11. H. Shrimali and S. Chatterjee, "11 GHz UGBW Op-amp with feed-forward compensation technique," in IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, May 15-18, 2011, pp. 17–20.

Poster presentations

  1. H. Shrimali, "Third order harmonic cancellation technique for a parametric amplifier," Poster presented on National science day, Indian Institute of Technology, Delhi, Feb 28, 2011.
  2. H. Shrimali, "Ultra low power high speed on­chip digital storage oscilloscope," Poster presented on National science day, Indian Institute of Technology, Delhi, Feb 29, 2008.
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